MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 240

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

General Purpose I/O Module
12.3.1 Register Descriptions
12.3.1.1 Port Output Data Registers (PODR_x)
The PODR_x registers store the data to be driven on the corresponding port pins when the pins are
configured for general purpose output. The PODR_x registers are each 8 bits wide, but not all ports
use all 8 bits. The register definitions for all ports are shown in
The PODR_x registers are read/write. At reset, all implemented bits in the PODR_x registers are
set. Reserved bits always remain cleared.
Reading a PODR_x register returns the current values in the register, not the port x pin values. To
set bits in a PODR_x register, write 1s to the PODR_x bits, or write 1s to the corresponding bits in
the PPDSDR_x register. To clear bits in a PODR_x register, write 0s to the PODR_x bits, or write
0s to the corresponding bits in the PCLRR_x register.
12-12
Address
Address
Reset
Reset
Figure 12-4. Port ADDR Output Data Register (PODR_ADDR)
Address
W
W
R
R
Reset
Figure 12-2. Port x Output Data Registers (PODR_x)
Figure 12-3. Port x Output Data Registers (PODR_x)
IPSBAR + 0x10_0003 (PODR_BUSCTL); ;IPSBAR + 0x10_0009 (PODR_UARTL);
IPSBAR + 0x10_0001 (PODR_DATAH); IPSBAR + 0x10_0002 (PODR_DATAL);
W
R
IPSBAR + 0x10_0004 (PODR_BS); IPSBAR + 0x10_0007 (PODR_FECI2C)
1
0
7
7
0
1
7
PODR_ADDR
6
1
6
0
0
MCF5235 Reference Manual, Rev. 2
1
6
IPSBAR + 0x10_000B (PODR_TIMER)
IPSBAR + 0x10_0000 (PODR_ADDR)
5
1
5
0
0
1
5
1
0
0
4
4
0
0
4
PODR_x
0
0
3
1
1
3
3
2
0
0
Figure 12-2
1
1
2
2
PODR_x
0
0
1
1
1
1
1
0
0
0
through
Freescale Semiconductor
1
1
0
0
Figure
12-9.