MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 499

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

23.2.1.2 PIT Modulus Register (PMRn)
The 16-bit read/write PMRn contains the timer modulus value that is loaded into the PIT counter
when the count reaches 0x0000 and the PCSRn[RLD] bit is set.
When the PCSRn[OVW] bit is set, PMRn is transparent, and the value written to PMRn is
immediately loaded into the PIT counter. The prescaler counter is reset anytime a new value is
loaded into the PIT counter and also during reset. Reading the PMRn returns the value written in
the modulus latch. Reset initializes PMRn to 0xFFFF.
23.2.1.3 PIT Count Register (PCNTRn)
The 16-bit, read-only PCNTRn contains the counter value. Reading the 16-bit counter with two
8-bit reads is not guaranteed to be coherent. Writing to PCNTRn has no effect, and write cycles
are terminated normally.
Freescale Semiconductor
Address
Address
Reset
Reset
Bits
1
0
W
W
R
R
15
15
1
1
Name
RLD
14
14
EN
1
1
Table 23-3. PCSRn Field Descriptions (Continued)
13
13
1
1
Reload bit. The read/write reload bit enables loading the value of PMRn into the PIT
counter when the count reaches 0x0000.
0 Counter rolls over to 0xFFFF on count of 0x0000
1 Counter reloaded from PMRn on count of 0x0000
PIT enable bit. Enables PIT operation. When the PIT is disabled, the counter and prescaler
are held in a stopped state. This bit is read anytime, write anytime.
0 PIT disabled
1 PIT enabled
Figure 23-3. PIT Modulus Register (PMRn)
Figure 23-4. PIT Count Register (PCNTR)
IPSBAR + 0x0015_0004 (PIT0), IPSBAR + 0x0016_0004 (PIT1),
IPSBAR + 0x0015_0002 (PIT0);IPSBAR + 0x0016_0002 (PIT1);
IPSBAR + 0x0017_0002 (PIT2); IPSBAR + 0x0018_0002 (PIT3)
IPSBAR + 0x0017_0004 (PIT2), IPSBAR + 0x0018_0004 (PIT3)
12
12
1
1
11
11
1
1
MCF5235 Reference Manual, Rev. 2
10
10
1
1
1
1
9
9
1
1
8
8
PM
PC
Description
1
1
7
7
6
1
6
1
1
1
5
5
1
1
4
4
Memory Map/Register Definition
1
1
3
3
1
1
2
2
1
1
1
1
1
1
0
0
23-5