MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 179

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

8.3.1.1
Run mode is the normal system operating mode. Current consumption in this mode is related
directly to the system clock frequency.
8.3.1.2
Wait mode is intended to be used to stop only the CPU and memory clocks until a wakeup event
is detected. In this mode, peripherals may be programmed to continue operating and can generate
interrupts, which cause the CPU to exit from wait mode.
8.3.1.3
Doze mode affects the CPU in the same manner as wait mode, except that each peripheral defines
individual operational characteristics in doze mode. Peripherals which continue to run and have
the capability of producing interrupts may cause the CPU to exit the doze mode and return to run
mode. Peripherals which are stopped will restart operation on exit from doze mode as defined for
each peripheral.
8.3.1.4
Stop mode affects the CPU in the same manner as the wait and doze modes, except that all clocks
to the system are stopped and the peripherals cease operation.
Stop mode must be entered in a controlled manner to ensure that any current operation is properly
terminated. When exiting stop mode, most peripherals retain their pre-stop status and resume
operation.
The following subsections specify the operation of each module while in and when exiting
low-power modes.
Freescale Semiconductor
• An interrupt request whose priority is higher than the value programmed in the XLPM_IPL
• An interrupt request whose priority higher than the value programmed in the interrupt
• An interrupt request from a source which is not masked in the interrupt controller’s
• An interrupt request which has been enabled at the module of the interrupt’s origin.
field of the LPICR.
priority mask (I) field of the core’s status register.
interrupt mask register.
Run Mode
Wait Mode
Doze Mode
Stop Mode
MCF5235 Reference Manual, Rev. 2
Functional Description
8-5