TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 92

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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HDMADn
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Note: Read-modify-write instructions can be used on all these registers.
(2) HDMADn (DMA Transfer Destination Address Setting Register)
the destination address is updated by DMA execution, HDMADn is also updated.
supported. Therefore, specify an even-numbered address for transferring 2 bytes and
an address that is an integral multiple of 4 for transferring 4 bytes.
The HDMADn register is used to set the DMA transfer destination address. When
HDMAD0 to HDMAD5 have the same configuration.
Although the bus sizing function is supported, the address alignment function is not
DnDA15
DnDA23
DnDA7
15
23
Destination address
7
0
0
0
[23:16]
(0906H)
(0916H)
(0926H)
(0936H)
(0946H)
(0956H)
DnDA14
DnDA22
DnDA6
14
22
6
0
0
0
Figure3.6.3 HDMADn Register
DnDA13
DnDA21
DnDA5
13
21
HDMADn Register
5
0
0
0
Destination address [23:16] for DMAn
Destination address [15:8] for DMAn
Destination address [7:0] for DMAn
92CF26A-91
Destination address
DnDA12
DnDA20
DnDA4
12
20
4
0
0
0
(0905H)
(0915H)
(0925H)
(0935H)
(0945H)
(0955H)
[15:8]
R/W
R/W
R/W
DnDA11
DnDA19
DnDA3
11
19
3
0
0
0
DnDA10
DnDA18
DnDA2
Destination address
10
18
2
0
0
0
HDMAD0
HDMAD1
HDMAD2
HDMAD3
HDMAD4
HDMAD5
(0904H)
(0914H)
(0924H)
(0934H)
(0944H)
(0954H)
[7:0]
DnDA17
DnDA1
DnDA9
17
1
9
0
0
0
TMP92CF26A
DnDA16
DnDA0
DnDA8
16
0
8
0
0
0
2007-11-21

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