TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 76

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

ZZ:
0
DMAMn[4:0]
0 0 0 z z
0 0 1 z z
0 1 0 z z
0 1 1 z z
1 0 0 z z
1 0 1 z z
1 1 0 z z
1 1 1 00
00 = 1-byte transfer
01 = 2-byte transfer
10 = 4-byte transfer
11 = Reserved
0
(4) Detailed description of the transfer mode register
Note 1: n stands for the micro DMA channel number (0 to 7).
Note 2: The transfer mode register should not be set to any value other than those listed above.
Note 3: The execution state number shows number of best case (1-state memory access).
0
DMADn+/DMASn+: Post increment (Register value is incremented after transfer).
DMADn−/DMASn−: Post decrement (Register value is decremented after transfer).
“I/O” signifies fixed memory addresses; “memory” signifies incremented or decremented memory addresses.
Destination INC mode
(DMADn +) ← (DMASn)
DMACn
if DMACn = 0 then INTTCn
Destination DEC mode
(DMADn -) ← (DMASn)
DMACn
if DMACn = 0 then INTTCn
Source INC mode
(DMADn)
DMACn
if DMACn = 0 then INTTCn
Source DEC mode
(DMADn)
DMACn
if DMACn = 0 then INTTCn
Source and destination INC mode
(DMADn +) ← (DMASn +)
DMACn
If DMACn = 0 then INTTCn
Source and destination DEC mode
(DMADn -) ← (DMASn -)
DMACn
If DMACn = 0 then INTTCn
Destination and fixed mode
(DMADn) ← (DMASn)
DMACn
If DMACn = 0 then INTTCn
Counter mode
DMASn
DMACn
If DMACn = 0 then INTTCn
Mode
← DMASn + 1
← DMACn – 1
← DMACn – 1
← DMACn – 1
← DMACn - 1
← DMACn - 1
← DMACn – 1
← DMACn – 1
← (DMASn +)
← (DMASn -)
← DMACn - 1
DMAM0 to DMAM7
Mode Description
92CF26A-75
Execution Time
5 states
5 states
5 states
5 states
6 states
6 states
5 states
5 states
TMP92CF26A
2007-11-21