TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 22

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

The clock frequency input from the X1 and X2 pins is called f
called fs. The clock frequency selected by SYSCR1<GEAR2:0> is called the system clock f
to as one state.
(Operate only oscillator)
(Operate only oscillator)
(Operate only oscillator)
IDLE2 mode
(I/O operate)
IDLE1 mode
(I/O operate)
(I/O operate)
IDLE2 mode
IDLE1 mode
IDLE2 mode
IDLE1 mode
The clock operating modes are as follows: (a) PLL-OFF Mode (X1, X2 pins only),
Figure 3.3.1 shows a transition figure.
(b) PLL-ON Mode (X1, X2, and PLL).
Note 1: When shifting from PLL-ON mode to PLL-OFF mode, execute the following setting in the same order.
Note 2: It is not possible to shift from PLL-ON mode to STOP mode directly.
PLL-OFF mode should be set once before shifting to STOP mode.
(1) Change CPU clock (Set “0” to PLLCR0<FCSEL>)
(2) Stop PLL circuit (Set “0” to PLLCR1<PLLON>)
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
instruction
interrupt
Figure 3.3.1 System clock block diagram
(a)
(b)
PLL-OFF mode transition figure
PLL-OFF , PLL-ON mode transition figure
((12 or 16)×f
(f
(f
OSCH
PLL-OFF
OSCH
PLL-ON mode
PLL-OFF mode
92CF26A-21
(f
(f
OSCH
OSCH
OSCH
Reset
Reset
OSCH
/gear value)
/gear value)
Instruction (Note)
release Reset
release Reset
/16)
/16)
mode
and the clock frequency input from the XT1 and XT2 pins is
/gear value)
instruction
interrupt
instruction
interrupt
SYS
. And one cycle of f
(Stops all circuits)
(Stops all circuits)
STOP mode
STOP mode
SYS
TMP92CF26A
is defined
2007-11-21