TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 347

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

SIRCR
(1207H)
Bit symbol
Read/Write
Reset State
Function
Select
transmit
pulse
width
0: 3/16
1: 1/16
PLSEL
7
0
Receive
data
0: “H” pulse
1: “L” pulse
RXSEL
6
0
Figure 3.14.21 IrDA Control Register
Transmit
0: disable
1: enable
TXEN
5
0
92CF26A-346
Receive
0: disable
1: enable
RXEN
4
0
R/W
Select receive pulse width
Set effective pulse width to equal to more than 2x
× (value + 1) + 100ns
Can be set
Can not be set : 0, 15
SIRWD3
Select receive pulse width
Receive (recovery) operation
Transmit (modulation) operation
Select transmit pulse width
Formula: Effective pulse width ≥ 2x × (value + 1) + 100ns
0000
0001
1110
1111
to
3
0
1
0
1
0
1
0
Cannot be set
Equal or more than 4x + 100ns
Equal or more than 30x + 100ns
Can not be set
Disable receiving operation
(Received data is ignored)
Enabled receiving operation
Disabled transmission operation
(Input from SIO is ignored)
Enabled transmission operation
3/16 pulse width
1/16 pulse width
x = 1/f
: 1 to 14
SIRWD2
2
0
FPH
SIRWD1
1
0
SIRWD0
TMP92CF26A
0
0
2007-11-21