TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 16

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

3.1.2
Note1: This LSI builds in RAM internally. However, the data in internal RAM may not be held by Reset operation. After
Note2: This LSI builds in PMC function (for reducing stand-by current by blocking the power supply of DVCC1A and
• Sets the Stack Pointer (XSP) to 00000000H.
• Sets bits <IFF2:0> of the Status Register (SR) to “111” (thereby setting the Interrupt Level
• Clears bits <RFP1:0> of the Status Register to “00” (thereby selecting Register Bank 0).
• Sets the Program Counter (PC) as follows in accordance with the Reset Vector stored at
• Initializes the internal I/O registers as table of “Special Function Register” in Section 5.
is within the operating voltage range, and that the internal high-frequency oscillator has
stabilized. Then hold the
X1=10MHz).
system clock operates at 625 kHz(X1=10MHz).
registers do not change when the Reset is released.
Program Counter settings.
supplying power and the timing of releasing reset.
Reset Operation
Mask Register to level 7).
address FFFF00H~FFFF02H:
reset, initialize the data in internal RAM.
DVCC1C). However, if executing reset operation without supplying DVCC1A and DVCC1C, the current may flow
to internal. When reset this LSI, supply the power of DVCC1A and DVCC1C first and wait until the power supply
stabilizes.
PC<7:0>
PC<15:8>
PC<23:16>
When resetting the TMP92CF26A microcontroller, ensure that the power supply voltage
At reset, since the clock doublers (PLL0) is bypassed and the clock-gear is set to 1/16, the
When the Reset has been accepted, the CPU performs the following. CPU internal
When the Reset is released, the CPU starts executing instructions according to the
When the Reset is accepted, the CPU sets internal I/O, ports and other pins as follows.
Figure 3.1.1 shows reset timing chart. Figure 3.1.2 shows the example of order of
←
←
←
data in location FFFF00H
data in location FFFF01H
data in location FFFF02H
RESET
92CF26A-15
input Low for at least 20 system clocks (32µs at
TMP92CF26A
2007-11-21