TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 525

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

LCDHO2W
(0298H)
LCDHO1W
(0297H)
LCDHO0W
(0296H)
LCDHWB8
(0299H)
LCDHSW
(0294H)
LCDLDW
(0295H)
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
LGOE2 width (bits 9-8) LGOE1 width (bits 9-8)
HSW7
LDW7
O0W7
O1W7
O2W7
O2W9
7
0
7
0
7
0
7
0
7
0
7
0
HSW6
O0W6
O1W6
O2W6
LDW6
O2W8
6
6
6
6
6
0
0
0
0
0
6
0
signal width Bit8,9 Register
LHSYNC width Register
LLOAD width Register
LGOE0 width Register
LGOE1 width Register
LGOE2 width Register
92CF26A-524
HSW5
O0W5
O1W5
O2W5
O1W9
LDW5
5
5
5
5
5
5
0
0
0
0
0
0
LHSYNC width (bits 7-0)
LLOAD width (bits 7-0)
LGOE0 width (bits 7-0)
LGOE1 width (bits 7-0)
LGOE2 width (bits 7-0)
HSW4
LDW4
O0W4
O1W4
O2W4
O1W8
4
0
4
0
4
0
4
0
4
0
4
0
W
W
W
W
W
W
width (bit 8)
LGOE0
HSW3
O0W3
O1W3
O2W3
LDW3
O0W8
3
3
3
3
3
0
0
0
0
0
3
0
LLOAD width (bits 9-8)
HSW2
O0W2
O1W2
O2W2
LDW2
LDW9
2
2
2
2
2
0
0
0
0
0
2
0
HSW1
LDW1
O0W1
O1W1
O2W1
LDW8
1
0
1
0
1
0
1
0
1
0
1
0
TMP92CF26A
width (bit 8)
2007-11-21
LHSYNC
HSW0
O0W0
O1W0
O2W0
LDW0
HSW8
0
0
0
0
0
0
0
0
0
0
0
0