TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 403

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

EOP
(07CFH)
bit Symbol
Read/Write
Reset State
3.16.3.17 EOP Register
Note: EOP<EP7_EOPB, EP6_EOPB, EP5_EOPB, EP4_EOPB> registers are not used in the TMP92CF26A.
short packet is transmitting bulk-IN or interrupt-IN.
transmission data is written to the FIFO, or read all receiving data from the FIFO.
The UDC terminates its status stage on this signal.
this to terminate writing of transmission data. In this case, write “0” to <EP0_EOPB>
of writing endpoint. Write “1” to other bits.
This register is used when a control transfer type dataphase terminates or when a
In a control transfer type dataphase, write “0” to <EP0_EOPB> when all
When a short packet is transmitted by using bulk-IN or interrupt-IN endpoint, use
EP7_EOPB
W
7
1
EP6_EOPB
W
6
1
EP5_EOPB
92CF26A-402
W
5
1
EP4_EOPB
W
4
1
EP3_EOPB
W
3
1
EP2_EOPB
W
2
1
EP1_EOPB
W
1
1
TMP92CF26A
2007-11-21
EP0_EOPB
W
0
1