TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 746

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

HDMACA4
HDMACB4
HDMAM4
Symbol
HDMAS4
HDMAD4
(12) DMAC (5/7)
DMA
source
address
Register4
DMA
destination
address
Register4
DMA
Transfer
count
number A
Register4
DMA
Transfer
count
number B
Register4
DMA
transfer
Mode
Register4
Name
Address
094AH
094BH
094CH
0940H
0941H
0942H
0944H
0945H
0946H
0948H
0949H
D4SA15
D4SA23
D4DA15
D4DA23
D4CA15
D4CB15
D4CA7
D4CB7
D4SA7
D4DA7
7
0
0
0
0
0
0
0
0
0
0
D4SA14
D4SA22
D4DA14
D4DA22
D4CA14
D4CB14
D4SA6
D4DA6
D4CA6
D4CB6
6
0
0
0
0
0
0
0
0
0
0
92CF26A-745
D4SA13
D4SA21
D4DA13
D4DA21
D4CA13
D4CB13
D4DA5
D4CA5
D4CB5
D4SA5
5
Destination address for DMA4 (23:16)
0
0
0
0
0
0
0
0
0
0
Destination address for DMA4 (15:8)
Destination address for DMA4 (7:0)
Source address for DMA4 (23:16)
Transfer count A for DMA4 (15:8)
Transfer count B for DMA4 (15:8)
Source address for DMA4 (15:8)
Transfer count A for DMA4 (7:0)
Transfer count B for DMA4 (7:0)
Source address for DMA4 (7:0)
100: Source/destination INC
DMA transfer mode
000: Destination INC (I/O → MEM)
001: Destination DEC (I/O → MEM)
010: Source INC (MEM → I/O)
011: Source DEC (MEM → I/O)
101: Source/destination DEC
110: Source/destination fixed
111: Reserved
D4SA12
D4SA20
D4DA12
D4DA20
D4CA12
D4CB12
D4SA4
D4DA4
D4CA4
D4CB4
D4M4
(MEM → MEM)
4
0
0
0
0
0
0
0
0
0
0
0
(MEM → MEM)
(I/O→ I/O)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
D4SA11
D4SA19
D4DA11
D4DA19
D4CA11
D4CB11
D4SA3
D4DA3
D4CA3
D4CB3
D4M3
3
0
0
0
0
0
0
0
0
0
0
0
D4SA10
D4SA18
D4DA10
D4DA18
D4CA10
D4CB10
D4SA2
D4DA2
D4CA2
D4CB2
D4M2
R/W
2
0
0
0
0
0
0
0
0
0
0
0
Transfer data size
00: 1 byte
01: 2 bytes
10: 4 bytes
11: Reserved
D4DA17
D4SA17
D4SA9
D4DA1
D4DA9
D4CA1
D4CA9
D4CB1
D4CB9
D4SA1
D4M1
1
0
0
0
0
0
0
0
0
0
0
0
TMP92CF26A
2007-11-21
D4SA16
D4DA16
D4SA0
D4SA8
D4DA0
D4DA8
D4CA0
D4CA8
D4CB0
D4CB8
D4M0
0
0
0
0
0
0
0
0
0
0
0
0