TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 349

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

3.15.2
3.15.3
S
S
S
Slave address
Slave address
(a) Addressing format
(b) Addressing format (with restart)
(c) Free data format (data transferred from master device to slave device)
operation status.
Serial Bus Interface (SBI) Control
The Data Formats in the I
8 bits
Data
The following registers are used to control the serial bus interface and monitor the
The data formats in the I
8 bits
8 bits
• Serial bus interface control register 0 (SBICR0)
• Serial bus interface control register 1 (SBICR1)
• Serial bus interface control register 2 (SBICR2)
• Serial bus interface data buffer register (SBIDBR)
• I
• Serial bus interface status register (SBISR)
• Serial bus interface baud rate register 0 (SBIBR0)
1
S:
1
1
2
Start condition
R/
ACK:
P: Stop condition
C bus address register (I2CAR)
W
W
R
W
R
:
/
/
C
A
K
1
A
C
K
1
C
1
A
K
Figure 3.15.2 Data format in the I
Direction bit
Acknowledge bit
1 to 8 bits
1 to 8 bits
1 to 8 bits
Data
1 or more
Data
Data
2
2
C Bus Mode
C bus mode is shown below.
92CF26A-348
1 or more
1 or more
A
C
K
1
A
C
K
1
A
C
K
1
S
1 to 8 bits
1 to 8 bits
Slave address
Data
Data
2
C bus mode
8 bits
1
C
1
A
K
C
1
A
K
W
R
P
/
P
A
C
K
1
1 to 8 bits
1 or more
Data
TMP92CF26A
2007-11-21
C
1
A
K
P