TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 703

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Symbol
PWCR
PWFC
PUCR
PVCR
PXCR
PUFC
PVFC
PXFC
PZCR
(1) I/O ports (8/11)
PORTU
control
register
PORTU
function
register
PORTV
control
register
PORTV
function
register
PORTW
control
register
PORTW
function
register
PORTX
control
register
PORTX
function
register
PORTZ
control
register
Name
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
Address
00AAH
00ABH
00AEH
00A6H
00A7H
00AFH
00B2H
00B3H
006AH
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
0: Port
1: LD23
0: Port
1: SCL
0:Port
1:Reserved
PW7C
PW7F
PU7C
PV7C
0: Input 1: Output
PX7C
PU7F
PV7F
PX7F
PZ7C
W
W
7
−
−
−
−
−
−
−
−
−
0
0
0
0
0
0
0
0
0
0: Input
W
W
0: Port
1: LD22
0: Port
1: SDA
PW6C
PU6C
PW6F
PU6F
PV6C
PZ6C
PV6F
6
0
−
0
−
0
−
0
−
0
−
0
−
0
−
1: Output
92CF26A-702
0: Port
1: LD21@
<PU5C>=1
0:Port
1: X1USB
PW5C
PW5F
PU5C
PX5C
PU5F
PX5F
PZ5C
W
W
5
−
−
−
−
−
−
input
−
0
0
0
0
0
0
0
0: Port
1: LD20
0: Port
1:CLKOUT
at <PX4>=0
LDIV at
<PX4>=1
0: Input
0: Input
0: Input
0: Port 1: Reserved
PW4C
PW4F
PU4C
PU4F
PZ4C
PX4F
W
4
0
−
0
−
0
−
0
−
0
−
0
−
W
W
W
W
W
0: Port
1: LD19
1: Output
1: Output
1: Output
PW3C
PU3C
PW3F
PU3F
PZ3C
3
0
−
0
−
0
−
0
−
0
−
0: Port
1: LD18
0: Port
1:Reserved
PW2C
PW2F
PU2C
PV2C
PU2F
PV2F
PZ2C
2
−
−
−
−
−
−
−
0
0
0
0
0
0
0
0: Input 1: Output
0: Port
1: LD17
0: Port
1: Reserved
PW1C
PW1F
PU1C
PU1F
PV1C
PZ1C
PV1F
W
W
1
0
−
0
−
0
−
0
−
0
−
0
−
0
−
TMP92CF26A
2007-11-21
0: Port
0: Port
1: SCLK0@
<PV0C>=1
1: LD16
PW0C
PW0F
PU0C
PU0F
PV0C
PZ0C
PV0F
0
0
−
0
−
0
−
0
−
0
−
0
−
0
−