TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 332

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

SC0MOD0
(1202H)
3.14.3
Bit symbol
Read/Write
Reset State
Function
SFR
Figure 3.14.6 Serial Mode Control Register (channel 0, SC0MOD0)
Transfer
data bit 8
TB8
7
0
Hand shake
0: CTS
1: CTS
disable
enable
CTSE
6
0
Receive
function
0: Receive
1: Receive
disable
enable
RXE
92CF26A-331
5
0
Wake up
function
0: disable
1: enable
WU
4
0
R/W
Serial Transmission
Mode
00: I/O interface Mode
01: 7-bit UART Mode
10: 8-bit UART Mode
11: 9-bit UART Mode
SM1
3
0
Serial transmission clock source (UART)
Serial Transmission Mode
Wake-up function
Receiving Function
Handshake function (/CTS pin)
Transmission data bit 8
Note: The clock selection for the I/O
00 TMRA0 match detect signal
01 Baud rate generator
10 Internal clock f
11 External clock (SCLK0 input)
00
01
10
11
0
1
0
1
0
1
9-Bit UART
Interrupt generated
whenever data is received
Interrupt generated only
when RB8 = 1
Receive disabled
Receive enabled
Disabled (always transferable)
Enabled
I/O Interface Mode
UART mode
interface mode is controlled by the
serial bontrol register (SC0CR).
SM0
2
0
Serial transmission clock
(UART)
00: TMRA0 trigger
01: Baud rate generator
10: Internal clock f
11: External clcok
(SCLK0 input)
SC1
IO
1
0
7-bit mode
8-bit mode
9-bit mode
TMP92CF26A
Other Modes
2007-11-21
SC0
Don’t care
0
0
IO