TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 83

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Symbol
IIMC0
IIMC1
(1) External interrupt control
Interrupt
input mode
control 0
Interrupt
input mode
control 0
Name
Interrupt
Note 1: Disable INT0 request before changing INT0 pin mode from level sense to edge sense. (change <I0LE>from
Note 2: See electrical characteristics in section 4 for external interrupt input pulse width.
Note 3: In port setting, if 16 bit timer input is selected and capture control is executed, INT6 and INT7 don’t depend on
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
DI
LD
LD
NOP
NOP
NOP
EI
X: Don’t care, –: No change
“1” to “0”)
IIMC1 register setting. INT6 and INT7 operate by setting TBnMOD<TBnCPM1:0>.
Address
(Prohibit
(Prohibit
RMW)
RMW)
FAH
F6H
Pin Name
INT5EDGE
0: Rising
1: Falling
PC0
PC1
PC2
PC3
PP3
PP4
PP5
P96
(IIMC0), XXXXXX0-B
(INTCLR), 0AH
I5EDGE
7
0
Settings of External Interrupt Pin Function
INT4EDGE
0: Rising
1: Falling
I4EDGE
6
0
92CF26A-82
; Switches from level to edge.
INT3EDGE
0: Rising
1: Falling
Mode
Rising edge
Falling edge
High level
Rising edge
Falling edge
Rising edge
Falling edge
Rising edge
Falling edge
Rising edge
Falling edge
Rising edge
Falling edge
Rising edge
Falling edge
Rising edge
Falling edge
I3EDGE
5
0
W
; Clears interrupt request flag.
; Wait EI execution
INT2EDGE
0: Rising
1: Falling
I2EDGE
4
0
<I0LE> = 0,<I0EDGE> = 0
<I0LE> = 0, <I0EDGE> = 1
<I0LE> = 1
<I1EDGE> = 0
<I1EDGE> = 0
<I2EDGE> = 0
<I2EDGE> = 1
<I3EDGE> = 0
<I3EDGE> = 1
<I4EDGE> = 0
<I4EDGE> = 1
<I5EDGE> = 0
<I5EDGE> = 1
<I6EDGE> = 0
<I6EDGE> = 1
<I7EDGE> = 0
<I7EDGE> = 1
INT1EDGE
0: Rising
1: Falling
I1EDGE
3
0
Setting Method
INT0EDGE
0: Rising
1: Falling
I0EDGE
2
0
INT0
0:Edge
1: Level
INT7EDGE
0: Rising
1: Falling
I7EDGE
mode
mode
I0LE
TMP92CF26A
1
0
0
2007-11-21
R/W
W
Always
write “0”.
INT6EDGE
0: Rising
1: Falling
I6EDGE
0
0
0
−