XC4VFX60-11FFG672I Xilinx Inc, XC4VFX60-11FFG672I Datasheet - Page 328

• Manufacturer Part Number: XC4VFX60-11FFG672I
• Description: IC FPGA VIRTEX-4 FX 60K 672-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-11FFG672I

• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Total Ram Bits: 4276224
• Number Of I /o: 352
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA, FCBGA
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 7: SelectIO Logic Resources
328
IDDR VHDL and Verilog Templates
IDDR VHDL Template
IDDR Verilog Template
The following examples illustrate the instantiation of the IDDR primitive in VHDL and
Verilog.
--Example IDDR component declaration
component IDDR
--Example IDDR instantiation
U_IDDR : IDDR
Port map(
//Example IDDR module declaration
module IDDR (Q1, Q2, C, CE, D, R, S);
generic(
port(
end component;
);
);
);
output Q1;
output Q2;
input C;
input CE;
input D;
tri0 GSR = glbl.GSR;
input R;
input S;
DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
INIT_Q1
INIT_Q2
SRTYPE
Q1
Q2
C
CE
D
R
S
Q1 => user_q1,
Q2 => user_q2,
C => user_c,
CE => user_ce,
D => user_d,
R => user_r,
S => user_s
www.xilinx.com
: out std_ulogic;
: out std_ulogic;
: in
: in
: in
: in
: in
: bit
: bit
: string := "SYNC";
std_ulogic;
std_ulogic;
std_ulogic;
std_ulogic;
std_ulogic
:= '0';
:= '0';
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
R