XC4VFX60-11FFG672I Xilinx Inc, XC4VFX60-11FFG672I Datasheet - Page 239

• Manufacturer Part Number: XC4VFX60-11FFG672I
• Description: IC FPGA VIRTEX-4 FX 60K 672-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-11FFG672I

• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Total Ram Bits: 4276224
• Number Of I /o: 352
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA, FCBGA
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
Input Termination to V
Some I/O standards (e.g., HSTL Class I and II) require an input termination voltage of
V
This is equivalent to having a split termination composed of two resistors. One terminates
to V
V
resistors, i.e., the resistors to V
Both HSTL and SSTL standards need 50Ω external reference resistors. The DCI I/O
standards supporting split termination are: HSTL_I_DCI, HSTL_I_DCI_18, HSTL_II_DCI,
HSTL_II_DCI_18, DIFF_HSTL_II_DCI, DIFF_HSTL_II_DCI_18, SSTL2_I_DCI,
SSTL2_II_DCI, SSTL18_I_DCI, SSTL18_II_DCI, DIFF_SSTL2_II_DCI, and
DIFF_SSTL18_II_DCI.
Figure 6-9
CCO
CCO
CCO
/2 (see
/2 using split termination. The termination resistance is set by the external reference
Figure 6-9: Input Termination to V
, the other to ground. The resistor values are 2R. DCI provides termination to
illustrates split termination inside a Virtex-4 device.
Figure
Figure 6-8: Input Termination to V
6-8).
CCO
www.xilinx.com
/2 (Split Termination)
Z
0
Z
CCO
0
SelectIO Technology Resources General Guidelines
V
and ground are each twice the reference resistor value.
CCO
Virtex-4 FPGA DCI
IOB
R
V
/2
CCO
Virtex-4 FPGA
IOB
2R
2R
V
CCO
REF
V
/2 Using DCI Split Termination
REF
CCO
UG070_6_09_030708
UG070_6_08_030708
/2 without DCI
239