XC4VFX60-11FFG672I Xilinx Inc, XC4VFX60-11FFG672I Datasheet - Page 21

• Manufacturer Part Number: XC4VFX60-11FFG672I
• Description: IC FPGA VIRTEX-4 FX 60K 672-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-11FFG672I

• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Total Ram Bits: 4276224
• Number Of I /o: 352
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA, FCBGA
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

About This Guide
Guide Contents
Additional Documentation
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
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This document describes the Virtex®-4 FPGA architecture. Complete and up-to-date
documentation of the Virtex-4 family of FPGAs is available on the Xilinx® website at
http://www.xilinx.com/virtex4.
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The following documents are also available for download at
http://www.xilinx.com/virtex4.
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Chapter 1, “Clock Resources”
Chapter 2, “Digital Clock Managers (DCMs)”
Chapter 3, “Phase-Matched Clock Dividers (PMCDs)”
Chapter 4, “Block RAM”
Chapter 5, “Configurable Logic Blocks (CLBs)”
Chapter 6, “SelectIO Resources”
Chapter 7, “SelectIO Logic Resources”
Chapter 8, “Advanced SelectIO Logic Resources”
Chapter 9, “Temperature Sensing Diode”
DS112, Virtex-4 Family Overview
The features and product selection of the Virtex-4 family are outlined in this overview.
DS302, Virtex-4 Data Sheet: DC and Switching Characteristics
This data sheet contains the DC and Switching Characteristic specifications for the
Virtex-4 family.
UG073, XtremeDSP for Virtex-4 FPGAs User Guide
This guide describes the XtremeDSP™ slice and includes reference designs for using
DSP48 math functions and various FIR filters.
UG071, Virtex-4 Configuration Guide
This all-encompassing configuration guide includes chapters on configuration
interfaces (serial and SelectMAP), bitstream encryption, Boundary-Scan and JTAG
configuration, reconfiguration techniques, and readback through the SelectMAP and
JTAG interfaces.
www.xilinx.com
Preface
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