LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 9

FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd

LFXP2-5E-5FTN256I

Manufacturer Part Number
LFXP2-5E-5FTN256I
Description
FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-5E-5FTN256I

Number Of Macrocells
5000
Number Of Programmable I/os
172
Data Ram Size
169984
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
172
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
23
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
LatticeXP2 Configuration Encryption and Security Usage Guide
ispJTAG Pins ................................................................................................................................................... 14-8
Configuration Modes and Options.................................................................................................................... 14-9
Wake Up Options ........................................................................................................................................... 14-11
Software Selectable Options.......................................................................................................................... 14-12
One Time Programmable Fuse...................................................................................................................... 14-14
User GOE....................................................................................................................................................... 14-14
Tag Memory ................................................................................................................................................... 14-15
User Flash...................................................................................................................................................... 14-16
Technical Support Assistance........................................................................................................................ 14-17
Revision History ............................................................................................................................................. 14-17
Introduction ...................................................................................................................................................... 15-1
Encryption/Decryption Flow ............................................................................................................................. 15-1
Encrypting the JEDEC File............................................................................................................................... 15-1
Security Bit for the Configuration and User Flash (CONFIG_SECURE).......................................................... 15-6
Advanced Security Settings ............................................................................................................................. 15-6
One-Time Programmable (OTP) or Permanent Lock ...................................................................................... 15-6
Flash Protect .................................................................................................................................................... 15-7
Encryption ........................................................................................................................................................ 15-8
Usercode in Encrypted Files ............................................................................................................................ 15-8
Decryption Flow ............................................................................................................................................... 15-8
Verifying a Configuration.................................................................................................................................. 15-9
References....................................................................................................................................................... 15-9
Technical Support Assistance.......................................................................................................................... 15-9
Revision History ............................................................................................................................................... 15-9
SRAM...................................................................................................................................................... 14-7
Flash Background ................................................................................................................................... 14-7
TDO......................................................................................................................................................... 14-8
TDI .......................................................................................................................................................... 14-8
TMS......................................................................................................................................................... 14-8
TCK ......................................................................................................................................................... 14-8
VCCJ....................................................................................................................................................... 14-8
Configuration and JTAG Voltage Levels ................................................................................................. 14-8
Configuration Options ............................................................................................................................. 14-9
Slave SPI Mode ...................................................................................................................................... 14-9
Master SPI Mode .................................................................................................................................. 14-10
Self Download Mode ............................................................................................................................. 14-10
ispJTAG Mode ...................................................................................................................................... 14-10
Wake Up Sequence .............................................................................................................................. 14-11
Slave SPI Port....................................................................................................................................... 14-12
Master SPI Port..................................................................................................................................... 14-13
Configuration Mode............................................................................................................................... 14-13
DONE Open Drain ................................................................................................................................ 14-13
DONE External...................................................................................................................................... 14-13
Master Clock Selection ......................................................................................................................... 14-13
Security ................................................................................................................................................. 14-14
Wake Up Sequence .............................................................................................................................. 14-14
Wake On Lock Selection....................................................................................................................... 14-14
Power Save........................................................................................................................................... 14-14
Slave SPI Mode Operation.................................................................................................................... 14-16
ispLEVER Flow ....................................................................................................................................... 15-2
ispVM Flow.............................................................................................................................................. 15-2
Programming the Key into the Device..................................................................................................... 15-4
Changing Flash Protect........................................................................................................................... 15-7
8
LatticeXP2 Family Handbook
Table of Contents

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