LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 144

FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd

LFXP2-5E-5FTN256I

Manufacturer Part Number
LFXP2-5E-5FTN256I
Description
FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-5E-5FTN256I

Number Of Macrocells
5000
Number Of Programmable I/os
172
Data Ram Size
169984
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
172
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
23
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
)
-- synthesis translate_on
DCS Usage with Verilog - Example
module dcs(clk0,clk1,sel,dcsout);
input clk0, clk1, sel;
output dcsout;
DCS DCSInst0 (.SEL(sel),.CLK0(clk0),.CLK1(clk1),.DCSOUT(dcsout));
defparam DCSInst0.DCSMODE = “CLK0”;
endmodule
Oscillator (OSCE)
There is a dedicated oscillator in the LatticeXP2 device whose output is made available for users.
The oscillator frequency output is routed through a divider which is used as an input clock to the clock tree. The
available outputs of the divider are shown in Table 9-13. The oscillator frequency output can be further divided by
internal logic (user logic) for lower frequencies, if desired. The oscillator is powered down when not in use.
The output of this oscillator is not a precision clock. It is intended as an extra clock that does not require accurate
clocking.
Primitive Name: OSCE
Table 9-12. OSCE Port Definition
Table 9-13. OSCE Attribute Definition
OSC Primitive Symbol (OSCE)
Figure 9-21. OSC Symbol
Nominal Frequency
DCSMODE
PORT MAP (
User Attribute
=> “POS”
SEL
CLK0
CLK1
DCSOUT
);
Attribute Name
Output
NOM_FREQ
I/O
=>
=>
=>
=>
Name
clksel,
dcsclk0,
sysclk1,
dcsclk
OSC
OSCE
2.5, 3.14, 4.3, 5.4, 6.9, 8.1, 9.2, 10, 13, 15,
9-22
20, 26, 32, 40, 54, 80, 163
Oscillator Clock Output
OSC
Description
Value (MHz)
LatticeXP2 sysCLOCK PLL
Design and Usage Guide
Default Value
2.5

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