LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 200

• Manufacturer Part Number: LFXP2-5E-5FTN256I
• Description: FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-5E-5FTN256I

• Number Of Macrocells: 5000
• Number Of Programmable I/os: 172
• Data Ram Size: 169984
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 169984
• Number Of I /o: 172
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LatticeXP2 Memory Usage Guide
Availability of TAG Memory
TAG memory is available most of time on the Slave SPI interface with the following exceptions:
• When the SRAM fuses are being accessed by the JTAG port, Slave SPI interface or refreshing
• When the other Flash cells are being accessed through the JTAG port or Slave SPI interface
• While JTAG BSCAN testing is taking place
• The Slave SPI interface is disabled with the persistent fuse programmed (set to off)
AC Timing
• 25 MHz maximum CLK
• 5 uS minimum read command delay
• 2 mS minimum delay from VCCmin to shifting in the first command
Programming Timing
• 1 sec. maximum erase time
• 5 mS maximum programming time
Programming via the JTAG Interface
.VME files can be generated for the ispVM System software which only programs the TAG memory. These .VME
files are handled according to the standard ispVME flow.
Initializing Memory
In the EBR based ROM or RAM memory modes and the PFU based ROM memory mode, it is possible to specify
the power-on state of each bit in the memory array. Each bit in the memory array can have one of two values: 0 or
1.
Initialization File Format
The initialization file is an ASCII file, which users can create or edit using any ASCII editor. IPexpress supports
three types of memory file formats:
• Binary file
• Hex File
• Addressed Hex
The file name for the memory initialization file is *.mem (<file_name>.mem). Each row depicts the value to be
stored in a particular memory location and the number of characters (or the number of columns) represents the
number of bits for each address (or the width of the memory module).
The Initialization File is primarily used for configuring the ROMs. The EBR in RAM mode can optionally use this Ini-
tialization File also to preload the memory contents.
The TAG memory uses hex or binary non-addressed files. Since it is a SPI, it cannot use the addressed hex file.
10-50