LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 199

• Manufacturer Part Number: LFXP2-5E-5FTN256I
• Description: FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-5E-5FTN256I

• Number Of Macrocells: 5000
• Number Of Programmable I/os: 172
• Data Ram Size: 169984
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 169984
• Number Of I /o: 172
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 10-59. STATUS Waveform
Specifications and Timing Diagrams
Powering Up
TAG memory is available when the boot-up either from the internal embedded Flash or from the external SPI Flash
boot PROM is complete. If the embedded Flash is blank, the boot up will not work. It is recommended to wait for the
same amount of delay as if the embedded configuration has been programmed before accessing the TAG memory.
If the boot-up is from external SPI Flash, longer delay time should be given or check the DONE pin for a high first
before accessing the TAG memory.
The SPI interface needs the low-to-high transition on the Chip Select pin to reset. During power-up, the low-to-high
transition is assured by requiring the CLK pin tracking the VCC. The other method is to drive the Chip Select pin to
high then low then high to reset the SPI interface before shifting the first command into the device.
Figure 10-60. Device Power-up Waveform
CS
CLK
SI
SO
Capture Starts on Third Dummy Clock
VCCmin
8 Bits READ_TAG
Command
Enable SO On 24th Dummy Clock
Chip Select Must Track VCC.
Power Up Timing And Voltage Level
24 Bits Dummy
Boot Up From The
Embedded FLASH.
HI-Z
10-49
0 1 2
Dummy
Status Bit
LatticeXP2 Memory Usage Guide
6
TAG Memory Is Fully
Accessible.
Provide Device Additional Erase
7
Or Programming Time
HI-Z
VCCAUX Or VCC
Whichever Is The
Last.