LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 315

FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd

LFXP2-5E-5FTN256I

Manufacturer Part Number
LFXP2-5E-5FTN256I
Description
FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-5E-5FTN256I

Number Of Macrocells
5000
Number Of Programmable I/os
172
Data Ram Size
169984
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
172
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
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LFXP2-5E-5FTN256I
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LFXP2-5E-5FTN256I
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Lattice Semiconductor
One Shot SED in VHDL
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity example is
end;
architecture behavioral of example is
end component;
begin
end behavioral ;
port (
component SEDBB -- This is for One Shot SED
generic (OSC_DIV : integer := 1); -- set SEDCLKIN divider
port (
isnt1: SEDBB
generic map (OSC_DIV=> “1”)
port map (
sed_done : out std_logic;
sed_in_prog : out std_logic;
sed_out : out std_logic);
SEDDONE : out std_logic;
SEDINPROG : out std_logic;
SEDERR : out std_logic
);
SEDERR => sed_out, -- wired to an output
SEDDONE => sed_done, -- wired to an output
SEDINPROG => sed_in_prog); -- wired to an output
16-7
Detection Usage Guide
LatticeXP2 Soft Error

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