LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 169

FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd

LFXP2-5E-5FTN256I

Manufacturer Part Number
LFXP2-5E-5FTN256I
Description
FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-5E-5FTN256I

Number Of Macrocells
5000
Number Of Programmable I/os
172
Data Ram Size
169984
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
172
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
23
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
Users have the option to enable the output registers for Pseudo-Dual Port RAM (RAM_DP). Figures 10-16 and 10-
17 show the internal timing waveforms for Pseudo-Dual Port RAM (RAM_DP) with these options.
Figure 10-16. PSEUDO DUAL PORT RAM Timing Diagram - without Output Registers
WrClockEn
RdClockEn
WrAddress
RdAddress
WrClock
RdClock
Data
Q
t
t
t
SUADDR_EBR
SUADDR_EBR
SUDATA_EBR
t
SUCE_EBR
Data_0
Add_0
t
t
t
HDATA_EBR
HADDR_EBR
HADDR_EBR
Invalid Data
Data_1
Add_1
10-19
t
SUCE_EBR
Add_0
t
HCE_EBR
LatticeXP2 Memory Usage Guide
t
CO_EBR
Data_0
Add_1
Data_2
Add_2
Data_1
Add_2
t
HCE_EBR
Dat
a_2

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