UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 721

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.1 Overview
The following reset functions are available.
(1) Four kinds of reset sources
(2) Emergency operation mode
Caution An LVI circuit internal reset does not reset the LVI circuit.
Remarks 1. LVIM: Low-voltage detection register
WDT2 reset signal
CLM reset signal
LVI reset signal
• External reset input via the RESET pin
• Reset via the watchdog timer 2 (WDT2) overflow (WDT2RES)
• System reset via the comparison of the low-voltage detector (LVI) supply voltage and detected voltage
• System reset via the detecting clock monitor (CLM) oscillation stop
After a reset is released, the source of the reset can be confirmed with the reset source flag register (RESF).
If the WDT2 overflows during the main clock oscillation stabilization time inserted after reset, a main clock
oscillation anomaly is judged and the CPU starts operating on the internal oscillation clock.
Caution In the emergency operation mode, do not access the on-chip peripheral I/O registers other
RESET
2. LVIS: Low-voltage detection level select register
than those for the “interrupt function, port function, WDT2, and timer M” that can operate on
the internal oscillation clock. In addition, operating CSIB0 to CSIB4 and UARTA0 by using an
external clock is also prohibited.
Figure 22-1. Block Diagram of Reset Function
CHAPTER 22 RESET FUNCTIONS
Preliminary User’s Manual U18953EJ1V0UD
WDT2RF
Set
Clear
CLMRF
Set
Clear
Reset source flag
register (RESF)
LVIRF
Set
Clear
Internal bus
Reset signal
Reset signal to
LVIM/LVIS register
Reset signal
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