UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 367

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

to TOQ03 pins are inverted. When the count value of the 16-bit counter later matches the set value of the TQ0CCRm
register, a compare match interrupt request signal (INTTQ0CCm) is generated, and the output signal of the TOQ0m
pin is inverted.
generates an overflow interrupt request signal (INTTQ0OV) at the next clock, is cleared to 0000H, and continues
counting. At this time, the overflow flag (TQ0OPT0.TQ0OVF bit) is also set to 1. Clear the overflow flag to 0 by
executing the CLR instruction by software.
at that time, and compared with the count value.
When the TQ0CE bit is set to 1, 16-bit timer/event counter Q starts counting, and the output signals of the TOQ00
The 16-bit counter continues counting in synchronization with the count clock. When it counts up to FFFFH, it
The TQ0CCRm register can be rewritten while the counter is operating. If it is rewritten, the new value is reflected
INTTQ0CC0 signal
INTTQ0CC1 signal
INTTQ0CC2 signal
INTTQ0CC3 signal
TQ0CCR0 register
TQ0CCR1 register
TQ0CCR2 register
TQ0CCR3 register
TOQ00 pin output
TOQ01 pin output
TOQ02 pin output
TOQ03 pin output
INTTQ0OV signal
16-bit counter
Figure 8-29. Basic Timing in Free-Running Timer Mode (Compare Function)
TQ0OVF bit
TQ0CE bit
FFFFH
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
D
D
10
10
Preliminary User’s Manual U18953EJ1V0UD
D
20
D
30
D
00
D
20
Cleared to 0 by
CLR instruction
D
30
D
D
00
11
D
20
D
30
D
00
CLR instruction
Cleared to 0 by
D
11
D
11
D
21
D
31
D
D
01
21
D
31
CLR instruction
Cleared to 0 by
D
01
D
11
D
21
D
31
D
01
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