UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 277

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 7-33. Software Processing Flow in Free-Running Timer Mode (Capture Function) (2/2)
Remark
n = 0 to 5
<1> Count operation start flow
<2> Overflow flag clear flow
<3> Count operation stop flow
(TPnCKS0 to TPnCKS2 bits)
TPnOVF bit (CLR TPnOVF).
Execute instruction to clear
Read TPnOPT0 register
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Register initial setting
(check overflow flag).
TPnCTL1 register,
TPnIOC1 register,
TPnOPT0 register
TPnCTL0 register
TPnOVF bit = 1
TPnCE bit = 0
TPnCE bit = 1
START
STOP
Preliminary User’s Manual U18953EJ1V0UD
YES
NO
Counter is initialized and
counting is stopped by
clearing TPnCE bit to 0.
Initial setting of these registers
is performed before the TPnCE
bit is set to 1.
The TPnCKS0 to TPnCKS2 bits can
be set when counting starts
(TPnCE bit = 1).
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