UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 437

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(6) Power-fail compare mode register (ADA0PFM)
The ADA0PFM register is an 8-bit register that sets the power-fail compare mode.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. In the select mode, the 8-bit data set to the ADA0PFT register is compared with the
ADA0PFM
2. In the scan mode, the 8-bit data set to the ADA0PFT register is compared with the
3. In the following modes, write data to the ADA0PFM register while A/D conversion is
After reset:
value of the ADA0CRnH register specified by the ADA0S register. If the result matches
the condition specified by the ADA0PFC bit, the conversion result is stored in the
ADA0CRn register and the INTAD signal is generated. If it does not match, however,
the interrupt signal is not generated.
contents of the ADA0CR0H register. If the result matches the condition specified by
the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and the
INTAD signal is generated. If it does not match, however, the INTAD signal is not
generated. Regardless of the comparison result, the scan operation is continued and
the conversion result is stored in the ADA0CRn register until the scan operation is
completed. However, the INTAD signal is not generated after the scan operation has
been completed.
stopped (ADA0M0.ADA0CE bit = 0), and then enable the A/D conversion operation
(ADA0CE bit = 1).
•
•
Normal conversion mode
One-shot select mode/one-shot scan mode in high-speed conversion mode
ADA0PFE
ADA0PFC
ADA0PFE
00H
0
1
0
1
<7>
R/W
ADA0PFC
Power-fail compare disabled
Power-fail compare enabled
Generates an interrupt request signal (INTAD) when ADA0CRnH ≥ ADA0PFT
Generates an interrupt request signal (INTAD) when ADA0CRnH < ADA0PFT
6
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 13 A/D CONVERTER
Address:
Selection of power-fail compare enable/disable
5
0
Selection of power-fail compare mode
FFFFF204H
4
0
3
0
2
0
0
1
0
0
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