UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 656

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UPD70F3737GC-UEU-AX

Manufacturer Part Number
UPD70F3737GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GC-UEU-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
84
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
8K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 12x10b, D/A 2x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
656
Maskable Interrupt
Type
Remarks 1. Default Priority: The priority order when two or more maskable interrupt requests occur at the same
Classification
2. The execution address of the illegal instruction when an illegal opcode exception occurs is calculated
Restored PC:
nextPC:
by (Restored PC − 4).
Default
Priority
48
49
50
51
52
53
54
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
INTDMA0
INTDMA1
INTDMA2
INTDMA3
INTKR
INTWTI
INTWT
Name
time. The highest priority is 0.
The priority order of non-maskable interrupt is INTWDT2 > NMI.
The value of the program counter (PC) saved to EIPC, FEPC, or DBPC when
interrupt servicing is started. Note, however, that the restored PC when a non-
maskable or maskable interrupt is acknowledged while one of the following
instructions is being executed does not become the nextPC (if an interrupt is
acknowledged during interrupt execution, execution stops, and then resumes after
the interrupt servicing has finished).
• Load instructions (SLD.B, SLD.BU, SLD.H, SLD.HU, SLD.W)
• Division instructions (DIV, DIVH, DIVU, DIVHU)
• PREPARE, DISPOSE instructions (only if an interrupt is generated before the
The PC value that starts the processing following interrupt/exception processing.
stack pointer is updated)
Table 19-1. Interrupt Source List (3/3)
DMA0 transfer completion
DMA1 transfer completion
DMA2 transfer completion
DMA3 transfer completion
Key return interrupt
Watch timer interval
Watch timer reference time
Preliminary User’s Manual U18953EJ1V0UD
Trigger
DMA
DMA
DMA
DMA
KR
WT
WT
Generating
Unit
0380H
0390H
03A0H
03B0H
03C0H
03D0H
03E0H
Exception
Code
00000380H nextPC
00000390H nextPC
000003A0H nextPC
000003B0H nextPC
000003C0H nextPC
000003D0H nextPC
000003E0H nextPC
Address
Handler
Restored
PC
DMAIC0
DMAIC1
DMAIC2
DMAIC3
KRIC
WTIIC
WTIC
Interrupt
Register
Control

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