UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 504

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.3 Configuration
504
The following shows the block diagram of CSIBn.
CSIBn includes the following hardware.
Registers
Control registers
Item
Remarks f
SCKBn
f
f
f
XX
XX
XX
f
f
f
f
SIBn
BRGm
XX
XX
XX
/16
/32
/64
/2
/4
/8
CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
CSIBn receive data register (CBnRX)
CSIBn transmit data register (CBnTX)
CSIBn control register 0 (CBnCTL0)
CSIBn control register 1 (CBnCTL1)
CSIBn control register 2 (CBnCTL2)
CSIBn status register (CBnSTR)
CBnCTL1
f
f
n = 0 to 4
m = 1 (n = 0, 1)
m = 2 (n = 2, 3)
m = 3 (n = 4)
CCLK
XX
BRGm
:
:
:
Figure 16-3. Block Diagram of CSIBn
Table 16-1. Configuration of CSIBn
Preliminary User’s Manual U18953EJ1V0UD
f
CCLK
Communication clock
Main clock frequency
BRGm count clock
Internal bus
Shift register
Phase control
CBnCTL0
CBnSTR
CBnTX
CBnRX
Controller
Configuration
CBnCTL2
SO latch
control
Phase
INTCBnT
INTCBnR
SOBn