UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 498

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UPD70F3737GC-UEU-AX

Manufacturer Part Number
UPD70F3737GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GC-UEU-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
84
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
8K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 12x10b, D/A 2x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
498
Therefore, the maximum baud rate that can be received by the destination is as follows.
Similarly, obtaining the following maximum allowable transfer rate yields the following.
Therefore, the minimum baud rate that can be received by the destination is as follows.
Obtaining the allowable baud rate error for UARTAn and the destination from the above-described equations for
obtaining the minimum and maximum baud rate values yields the following.
Remarks 1. The reception accuracy depends on the bit count in 1 frame, the input clock
4
8
20
50
100
255
Division Ratio (k)
10
11
BRmax = (FLmin/11)
BRmin = (FLmax/11)
× FLmax = 11 × FL −
FLmax =
2. k: Setting value of UAnCTL2.UAnBRS7 to UAnCTL2.UAnBRS0 bits (n = 0 to 2)
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Table 15-4. Maximum/Minimum Allowable Baud Rate Error
frequency, and the division ratio (k). The higher the input clock frequency
and the larger the division ratio (k), the higher the accuracy.
21k − 2
Maximum Allowable Baud Rate Error
20 k
1
1
=
FL × 11
=
Preliminary User’s Manual U18953EJ1V0UD
k + 2
2 × k
21k − 2
21k + 2
20k
22k
+2.32%
+3.52%
+4.26%
+4.56%
+4.66%
+4.72%
× FL =
Brate
Brate
21k − 2
2 × k
FL
Minimum Allowable Baud Rate Error
−2.43%
−3.61%
−4.30%
−4.58%
−4.67%
−4.72%

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