UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 491

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.6.10 Receive data noise filter
as the input data. Therefore, data not exceeding 2 clock width is judged to be noise and is not delivered to the internal
circuit (see Figure 15-15). See 15.7 (1) (a) Base clock regarding the base clock.
delayed by 3 clocks in relation to the external signal status.
Base clock (f
This filter samples the RXDAn pin using the base clock of the prescaler output.
When the same sampling value is read twice, the match detector output changes and the RXDAn signal is sampled
Moreover, since the circuit is as shown in Figure 15-14, the processing that goes on within the receive operation is
Internal signal C
Internal signal A
Internal signal B
RXDAn (input)
Base clock
RXDAn
UCLK
)
In
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Q
Figure 15-15. Timing of RXDAn Signal Judged as Noise
Internal signal A
Preliminary User’s Manual U18953EJ1V0UD
Figure 15-14. Noise Filter Circuit
Match
In
(judged as noise)
Q
Mismatch
Internal signal B
detector
Match
Match
In
LD_EN
Q
(judged as noise)
Internal signal C
Mismatch
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