UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 448

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

448
(1) Continuous select mode
(2) Continuous scan mode
A/D
In this mode, the result of converting the voltage of the analog input pin specified by the ADA0S register is
compared with the set value of the ADA0PFT register. If the result of power-fail comparison matches the
condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CRn register, and the INTAD
signal is generated. If it does not match, the conversion result is stored in the ADA0CRn register, and the
INTAD signal is not generated. After completion of the first conversion, the next conversion is started, unless
the ADA0M0.ADA0CE bit is cleared to 0 (n = 0 to 11).
In this mode, the results of converting the voltages of the analog input pins sequentially selected from the ANI0
pin to the pin specified by the ADA0S register are stored, and the set value of the ADA0CR0H register of
channel 0 is compared with the value of the ADA0PFT register. If the result of power-fail comparison matches
the condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register, and the INTAD
signal is generated. If it does not match, the conversion result is stored in the ADA0CR0 register, and the
INTAD signal is not generated.
After the result of the first conversion has been stored in the ADA0CR0 register, the results of sequentially
converting the voltages on the analog input pins up to the pin specified by the ADA0S register are continuously
stored. After completion of conversion, the next conversion is started from the ANI0 pin again, unless the
ADA0CE bit is cleared to 0.
conversion
ADA0CR1
INTAD
ANI1
Conversion start
Set ADA0CE bit = 1
Figure 13-8. Timing Example of Continuous Select Mode Operation
(When Power-Fail Comparison Is Made: ADA0S Register = 01H)
Data
Data 1
(ANI1)
1
ADA0PFT
unmatch
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 13 A/D CONVERTER
Data 1
(ANI1)
Data
Data 2
(ANI1)
ADA0PFT
unmatch
2
Data 2
(ANI1)
Data
Data 3
(ANI1)
3
ADA0PFT
match
Data 3
(ANI1)
Data
Data 4
(ANI1)
ADA0PFT
match
4
Data
Data 5
(ANI1)
Data 4
(ANI1)
Conversion start
Set ADA0CE bit = 1
5
Data
Data 6
(ANI1)
ADA0PFT
match
6
Data 6
(ANI1)
Data
Data 7
(ANI1)
7