UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 325

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

counts each time the valid edge of external event count input is detected. Additionally, the set value of the TQ0CCR0
register is transferred to the CCR0 buffer register.
cleared to 0000H, and a compare match interrupt request signal (INTTQ0CC0) is generated.
(set value of TQ0CCR0 register + 1) times.
When the TQ0CE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H. The counter
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The INTTQ0CC0 signal is generated each time the valid edge of the external event count input has been detected
TQ0CTL0
TQ0CTL1
TQ0IOC0
TQ0IOC2
(a) TMQ0 control register 0 (TQ0CTL0)
(b) TMQ0 control register 1 (TQ0CTL1)
(c) TMQ0 I/O control register 0 (TQ0IOC0)
(d) TMQ0 I/O control register 2 (TQ0IOC2)
(e) TMQ0 counter read buffer register (TQ0CNT)
The count value of the 16-bit counter can be read by reading the TQ0CNT register.
TQ0OL3
TQ0CE
Figure 8-11. Register Setting for Operation in External Event Count Mode (1/2)
0/1
0
0
0
TQ0OE3 TQ0OL2 TQ0OE2
TQ0EST
0
0
0
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0EEE
0
0
0
0
Preliminary User’s Manual U18953EJ1V0UD
0
0
0
0
TQ0EES1
TQ0OL1
0/1
0
0
0
TQ0EES0 TQ0ETS1 TQ0ETS0
TQ0CKS2 TQ0CKS1 TQ0CKS0
TQ0OE1 TQ0OL0 TQ0OE0
TQ0MD2 TQ0MD1 TQ0MD0
0/1
0
0
0
0
0
0
0
0
0
0
1
0: Disable TOQ00 pin output
0: Disable TOQ01 pin output
Select valid edge
of external event
count input
0: Disable TOQ02 pin output
0: Disable TOQ03 pin output
0: Stop counting
1: Enable counting
0, 0, 1:
External event count mode
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