HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 640

• Manufacturer Part Number: HD64F2218UTF24
• Description: IC H8S MCU FLASH 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2218UTF24

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The FLMCR1, FLMCR2, EBR1 and EBR2 settings are retained, but program mode or erase mode
is aborted at the point at which the error occurred. Program mode or erase mode cannot be re-
entered by re-setting the P1 or E1 bit. However, PV1 and EV1 bit setting is enabled, and a
transition can be made to verify mode.
17.10
All interrupts, including NMI interrupt is disabled when flash memory is being programmed or
erased (when the P1 or E1 bit is set in FLMCR1), and while the boot program is executing in boot
mode*
1. Interrupt during programming or erasing might cause a violation of the programming or
2. In the interrupt exception handling sequence during programming or erasing, the vector would
3. If interrupt occurred during boot program execution, it would not be possible to execute the
Notes: 1. Interrupt requests must be disabled inside and outside the CPU until the programming
Rev.7.00 Dec. 24, 2008 Page 584 of 698
REJ09B0074-0700
erasing algorithm, with the result that normal operation could not be assured.
not be read correctly*
normal boot mode sequence.
1
, to give priority to the program or erase operation. There are three reasons for this:
2. The vector may not be read correctly in this case for the following two reasons:
Interrupt Handling when Programming/Erasing Flash Memory
control program has completed programming.
• If flash memory is read while being programmed or erased (while the P1 or E1 bit is
• If the interrupt entry in the vector table has not been programmed yet, interrupt
set in FLMCR1), correct read data will not be obtained (undetermined values will
be returned).
exception handling will not be executed correctly.
2
, possibly resulting in CPU runaway.