HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 564

• Manufacturer Part Number: HD64F2218UTF24
• Description: IC H8S MCU FLASH 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2218UTF24

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(2) Data Stage (Control-In)
Rev.7.00 Dec. 24, 2008 Page 508 of 698
REJ09B0074-0700
The firmware first analyzes the command data that is sent from the host in the setup stage, and
determines the subsequent data stage direction. If the result of command data analysis is that
the data stage is in-transfer, one packet of data to be sent to the host is written to the FIFO. If
there is more data to be sent, this data is written to the FIFO after the data written first has been
sent to the host (EP0iTS in UIFR0 is set to 1).
The end of the data stage is identified when the host transmits an OUT token and the status
stage is entered.
Note: If the size of the data transmitted by the function is smaller than the data size requested by the host,
the function indicates the end of the data stage by returnning to the host a packet shorter than the
maximum packet size. If the size of the data transmitted by the function is an integral multiple of the
maximum packet size, the function indicates the end of the data stage by transmitting a zero-length
packet.
(EP0iTS in UIFR0 = 1)
Transmit data to host
Set EP0i transmit
Receive IN token
to EP0sRDFN
in EP0i FIFO?
USB function
complete flag
Figure 14.13 Data Stage Operation (Control-In)
in UTRG0?
Valid data
1 written
Yes
Yes
ACK
No
No
NAK
NAK
EXIRQx
Write data to USB endpoint
Write data to USB endpoint
(EP0iPKTE in UTRG0 = 1)
(EP0iPKTE in UTRG0 = 1)
data register 0i (UEDR0i)
data register 0i (UEDR0i)
Write 1 to EP0i packet
(EP0iTS in UIFR0 = 0)
Write 1 to EP0i packet
Clear EP0i transmit
From setup stage
complete flag
Firmware
enable bit
enable bit