HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 254

• Manufacturer Part Number: HD64F2218UTF24
• Description: IC H8S MCU FLASH 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2218UTF24

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Full Address Mode (Cycle Steal Mode): Figure 7.16 shows a transfer example in which TEND*
output is enabled and word-size full address mode transfer (cycle steal mode) is performed from
external 16-bit, 2-state access space to external 16-bit, 2-state access space.
A one-byte or one-word transfer is performed, and after the transfer the bus is released. While the
bus is released one bus cycle is inserted by the CPU.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
Note: * This LSI does not support TEND output.
Rev.7.00 Dec. 24, 2008 Page 198 of 698
REJ09B0074-0700
Address bus
TEND*
Note: * This LSI does not support TEND output.
HWR
LWR
RD
φ
Bus release
Figure 7.16 Example of Full Address Mode (Cycle Steal) Transfer
DMA read
DMA write
Bus release
DMA read DMA write
Bus release
DMA read DMA write
Last transfer cycle
DMA
dead
Bus release