HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 218
![IC H8S MCU FLASH 128K 100-TQFP](/photos/12/40/124067/hd64f2218utf24_sml.jpg)
HD64F2218UTF24
Manufacturer Part Number
HD64F2218UTF24
Description
IC H8S MCU FLASH 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Specifications of HD64F2218UTF24
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2218UTF24V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 218 of 758
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7.3.3
• Short Address Mode
• Full Address Mode
Rev.7.00 Dec. 24, 2008 Page 162 of 698
REJ09B0074-0700
ETCR is a 16-bit readable/writable register that specifies the number of transfers. The setting
of this register is different for sequential mode and idle mode on the one hand, and for repeat
mode on the other. ETCR is not initialized by a reset or in standby mode.
⎯ Sequential Mode and Idle Mode
⎯ Repeat Mode
ETCR is a 16-bit readable/writable register that specifies the number of transfers. The function
of this register is different in normal mode and in block transfer mode. ETCR is not initialized
by a reset or in standby mode.
⎯ Normal Mode
⎯ Block Transfer Mode
In sequential mode and idle mode, ETCR functions as a 16-bit transfer counter (with a
count range of 1 to 65,536). ETCR is decremented by 1 each time a transfer is performed,
and when the count reaches H'0000, the DTE bit in DMABCR is cleared, and transfer ends.
In repeat mode, ETCR functions as an 8-bit transfer counter ETCRL (with a count range of
1 to 256) and transfer number storage register ETCRH. ETCRL is decremented by 1 each
time a transfer is performed, and when the count reaches H'00, ETCRL is loaded with the
value in ETCRH. At this point, MAR is automatically restored to the value it had when the
count was started. The DTE bit in DMABCR is not cleared, and so transfers can be
performed repeatedly until the DTE bit is cleared by the user.
In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by
1 each time a transfer is performed, and transfer ends when the count reaches H'0000.
(b) ETCRB
ETCRB is not used in normal mode.
In block transfer mode, ETCRAL functions as an 8-bit block size counter and ETCRAH
holds the block size. ETCRAL is decremented each time a 1-byte or 1-word transfer is
performed, and when the count reaches H'00, ETCRAL is loaded with the value in
ETCRAH. So by setting the block size in ETCRAH and ETCRAL, it is possible to
repeatedly transfer blocks consisting of any desired number of bytes or words.
(b) ETCRB
ETCRB functions in block transfer mode, as a 16-bit block transfer counter. ETCRB is
decremented by 1 each time a block is transferred, and transfer ends when the count reaches
H'0000.
(a) ETCRA
(a) ETCRA
Execute Transfer Count Register (ETCR)
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