IPR-NIOS Altera, IPR-NIOS Datasheet - Page 67

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 3: Programming Model
Registers
Table 3–19. badaddr Control Register Fields
Table 3–20. badaddr Control Register Field Descriptions
Table 3–21. config Control Register Fields
December 2010 Altera Corporation
31
BADDR
31
30
Field
30
29
29
28
28
BADDR contains the byte instruction address or data address
associated with an exception when certain exceptions occur. The
Address column of
exceptions write the BADDR field.
27
27
26
26
When the option for extra exception information is enabled and a processor exception
occurs, the badaddr register contains the byte instruction or data address associated
with certain exceptions at the time the exception occurred.
shows which exceptions write the badaddr register along with the value written.
Table 3–19
Table 3–20
The BADDR field allows up to a 32-bit instruction address or data address. If an MMU
or MPU is present, the BADDR field is 32 bits because MMU and MPU instruction and
data addresses are always full 32-bit values. When an MMU is present, the BADDR field
contains the virtual address.
If there is no MMU or MPU and the Nios II address space is less than 32 bits, unused
high-order bits are written and read as zero. If there is no MMU, bit 31 of a data
address (used to bypass the data cache) is always zero in the BADDR field.
The config Register
The config register configures Nios II runtime behaviors that do not need to be
preserved during exception processing (in contrast to the information in the status
register).
25
25
24
24
23
23
Table 3–21
Table 3–33 on page 3–32
22
22
shows the layout of the badaddr register.
gives details of the fields defined in the badaddr register.
21
21
20
Description
20
19
19
shows the layout of the config register.
18
18
Reserved
17
17
BADDR
16
16
shows which
15
15
14
14
13
13
12
12
11
11
10
10
9
9
Access
Read
8
8
Nios II Processor Reference Handbook
Table 3–33 on page 3–32
7
7
6
6
Reset
5
5
0
4
4
3
information
3
Available
exception
Only with
extra
2
2
1
1
3–21
0
0