IPR-NIOS Altera, IPR-NIOS Datasheet - Page 245

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IPR-NIOS

Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IPR-NIOS

License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 8: Instruction Set Reference
Instruction Set Reference
jmpi
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
28
27
26
25
24
PC ← (PC
jmpi label
jmpi write_char
Transfers execution to the instruction at address (PC
jmpi is a low-overhead local jump. jmpi can transfer execution anywhere within the 256-MB
range determined by PC
which the address is out of this range.
None
J
IMM26 = 26-bit unsigned immediate value
23
22
21
31..28
20
: IMM26 × 4)
IMM26
19
18
31..28
17
. The Nios II GNU linker does not automatically handle cases in
16
15
14
13
12
11
31..28
10
: IMM26 × 4).
9
8
Nios II Processor Reference Handbook
7
6
jump immediate
5
4
0x01
3
2
1
8–59
0

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