IPR-NIOS Altera, IPR-NIOS Datasheet - Page 114

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

4–6
Nios II Processor Reference Handbook
slaves might go through additional hardware (called “burst adapters”) which
might decrease f
When the Nios II processor transfers execution to the first word of a cache line, the
processor fills the line by executing a sequence of word transfers that have
ascending addresses, such as 0, 4, 8, 12, 16, 20, 24, 28.
However, when the Nios II processor transfers execution to an instruction that is
not the first word of a cache line, the processor fetches the required (or “critical”)
instruction first, and then fills the rest of the cache line. The addresses of a burst
increase until the last word of the cache line is filled, and then continue with the
first word of the cache line. For example, with a 32-byte cache line, transferring
control to address 8 results in a burst with the following address sequence: 8, 12,
16, 20, 24, 28, 0, 4.
MAX
.
Chapter 4: Instantiating the Nios II Processor in SOPC Builder
December 2010 Altera Corporation
Caches and Memory Interfaces Page