IPR-NIOS Altera, IPR-NIOS Datasheet - Page 258

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–72
mulxss
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rC ← ((signed) rA) × ((signed) rB))
mulxss rC, rA, rB
mulxss r6, r7, r8
Treating rA and rB as signed integers, mulxss multiplies rA times rB, and stores the 32
high-order bits of the product to rC.
Nios II processors that do not implement the mulxss instruction cause an unimplemented
instruction exception.
Use mulxss and mul to compute the full 64-bit product of two 32-bit signed integers.
Furthermore, mulxss can be used as part of the calculation of a 128-bit product of two 64-bit
signed integers. Given two 64-bit integers, each contained in a pair of 32-bit registers,
(S1 : U1) and (S2 : U2), their 128-bit product is (U1 × U2) + ((S1 × U2) << 32) + ((U1 × S2) <<
32) + ((S1 × S2) << 64). The mulxss and mul instructions are used to calculate the 64-bit
product S1 × S2.
Unimplemented instruction
R
A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
23
22
21
20
19
C
18
17
16
15
63..32
14
0x1f
13
12
multiply extended signed/signed
11
10
9
0
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
4
0x3a
3
2
1
0