IPR-NIOS Altera, IPR-NIOS Datasheet - Page 107

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IPR-NIOS

Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IPR-NIOS

License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 3: Programming Model
Document Revision History
Document Revision History
Table 3–47. Document Revision History
December 2010 Altera Corporation
December 2010
July 2010
November 2009
March 2009
November 2008
May 2008
October 2007
May 2007
March 2007
November 2006
May 2006
October 2005
May 2005
September 2004
May 2004
Date
10.1.0
10.0.0
Version
9.1.0
9.0.0
8.1.0
8.0.0
7.2.0
7.1.0
7.0.0
6.1.0
6.0.0
5.1.0
5.0.0
Table 3–47
1.0
1.1
Maintenance release.
Maintenance release.
Maintenance release.
Maintenance release.
Added text to describe the MMU, MPU, and advanced exceptions.
Maintenance release.
Maintenance release.
Maintenance release.
Maintenance release.
Maintenance release.
Initial release.
Added external interrupt controller interface information.
Added shadow register set information.
Reworked text to refer to break and reset as exceptions.
Grouped exceptions, break, reset, and interrupts all under Exception Processing.
Added table showing all Nios II exceptions (by priority).
Removed “ctl” references to control registers.
Added jmpi instruction to tables.
Added table of contents to Introduction section.
Added Referenced Documents section.
Added details for new control register ctl5.
Updated details of debug and break processing to reflect new behavior of the break
instruction.
shows the revision history for this document.
Changes
Nios II Processor Reference Handbook
3–61

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