IPR-NIOS Altera, IPR-NIOS Datasheet - Page 194

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–8
addi
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rB ← rA + σ (IMM16)
addi rB, rA, IMM16
addi r6, r7, -100
Sign-extends the 16-bit immediate value and adds it to the value of rA. Stores the sum in rB.
Carry Detection (unsigned operands):
Following an addi operation, a carry out of the MSB can be detected by checking whether the
unsigned sum is less than one of the unsigned operands. The carry bit can be written to a
register, or a conditional branch can be taken based on the carry condition. Both cases are
shown below.
addi rB, rA, IMM16
cmpltu rD, rB, rA
addi rB, rA, IMM16
bltu rB, rA, label
Overflow Detection (signed operands):
An overflow is detected when two positives are added and the sum is negative, or when two
negatives are added and the sum is positive. The overflow condition can control a conditional
branch, as shown below.
addi rB, rA, IMM16
xor rC, rB, rA
xorhi rD, rB, IMM16
and rC, rC, rD
blt rC, r0,label
None
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit signed immediate value
23
22
21
20
19
18
17
16
15
IMM16
# The original add operation
# rD is written with the carry bit
# The original add operation
# Branch if carry generated
# The original add operation
# Compare signs of sum and rA
# Compare signs of sum and IMM16
# Combine comparisons
# Branch if overflow occurred
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13
12
11
10
9
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
add immediate
4
0x04
3
2
1
0