IPR-NIOS Altera, IPR-NIOS Datasheet - Page 256

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IPR-NIOS

Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IPR-NIOS

License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
8–70
mul
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rC ← (rA × rB)
mul rC, rA, rB
mul r6, r7, r8
Multiplies rA times rB and stores the 32 low-order bits of the product to rC. The result is the
same whether the operands are treated as signed or unsigned integers.
Nios II processors that do not implement the mul instruction cause an unimplemented
instruction exception.
Carry Detection (unsigned operands):
Before or after the multiply operation, the carry out of the MSB of rC can be detected using the
following instruction sequence:
mul rC, rA, rB
mulxuu rD, rA, rB
cmpne rD, rD, r0
The mulxuu instruction writes a nonzero value into rD if the multiplication of unsigned
numbers generates a carry (unsigned overflow). If a 0/1 result is desired, follow the mulxuu
with the cmpne instruction.
Overflow Detection (signed operands):
After the multiply operation, overflow can be detected using the following instruction sequence:
mul rC, rA, rB
cmplt rD, rC, r0
mulxss rE, rA, rB
add rD, rD, rE
cmpne rD, rD, r0
The cmplt–mulxss–add instruction sequence writes a nonzero value into rD if the product in
rC cannot be represented in 32 bits (signed overflow). If a 0/1 result is desired, follow the
instruction sequence with the cmpne instruction.
Unimplemented instruction
R
A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
23
22
21
20
31..0
19
C
18
17
16
# The mul operation (optional)
# rD is nonzero if carry occurred
# rD is 1 if carry occurred, 0 if not
# The original mul operation
# rD is nonzero if overflow
# rD is 1 if overflow, 0 if not
15
14
0x27
13
12
11
10
9
0
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
4
0x3a
3
multiply
2
1
0

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