IPR-NIOS Altera, IPR-NIOS Datasheet - Page 26

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

2–4
Arithmetic Logic Unit
Table 2–1. Operations Supported by the Nios II ALU
Nios II Processor Reference Handbook
Arithmetic
Relational
Logical
Shift and Rotate
Category
Unimplemented Instructions
Custom Instructions
f
f
The ALU supports addition, subtraction, multiplication, and division on signed and unsigned operands.
The ALU supports the equal, not-equal, greater-than-or-equal, and less-than relational operations (==,
!= >=, <) on signed and unsigned operands.
The ALU supports AND, OR, NOR, and XOR logical operations.
The ALU supports shift and rotate operations, and can shift/rotate data by 0 to 31 bit positions per
instruction. The ALU supports arithmetic shift right and logical shift right/left. The ALU supports rotate
left/right.
The Nios II ALU operates on data stored in general-purpose registers. ALU
operations take one or two inputs from registers, and store a result back in a register.
The ALU supports the data operations shown in
To implement any other operation, software computes the result by performing a
combination of the fundamental operations in
Some Nios II processor core implementations do not provide hardware to support the
entire Nios II instruction set. In such a core, instructions without hardware support
are known as unimplemented instructions.
The processor generates an exception whenever it issues an unimplemented
instruction so your exception handler can call a routine that emulates the operation in
software. Therefore, unimplemented instructions do not affect the programmer’s
view of the processor.
For a list of potential unimplemented instructions, refer to the
chapter of the Nios II Processor Reference Handbook.
The Nios II architecture supports user-defined custom instructions. The Nios II ALU
connects directly to custom instruction logic, enabling you to implement in hardware
operations that are accessed and used exactly like native instructions.
For further information, refer to the
Nios II Custom Instruction User
Details
Table
Table
2–1.
2–1.
December 2010 Altera Corporation
Chapter 2: Processor Architecture
Programming Model
Guide.
Arithmetic Logic Unit