IPR-NIOS Altera, IPR-NIOS Datasheet - Page 27

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Processor Architecture
Arithmetic Logic Unit
Table 2–2. Hardware Conformance with IEEE 754-1985 Floating-Point Standard
December 2010 Altera Corporation
Operations
Precision
Exception conditions
Rounding Modes
NaN
Subnormal
(denormalized)
numbers
Software exceptions
Status flags
Notes to
(1) The Nios II Embedded Design Suite (EDS) provides software implementations of primitive floating-point operations other than addition,
subtraction, multiplication, and division. This includes operations such as floating-point conversions and comparisons. The software
implementations of these primitives are 100% compliant with IEEE 754-1985.
Table
Floating-Point Instructions
(1)
2–2:
The Nios II architecture supports single precision floating-point instructions as
specified by the IEEE Std 754-1985. The basic set of floating-point custom instructions
includes single precision floating-point addition, subtraction, and multiplication.
Floating-point division is available as an extension to the basic instruction set. These
floating-point instructions are implemented as custom instructions.
provides a detailed description of the conformance to IEEE 754-1985.
Feature
Addition
Subtraction
Multiplication
Division
Single
Double
Invalid operation
Division by zero
Overflow
Inexact
Underflow
Round to nearest
Round toward zero
Round toward +infinity
Round toward –infinity
Quiet
Signaling
Implemented
Implemented
Implemented
Implemented
Not implemented. Double precision operations are implemented in
software.
Result is Not a Number (NaN)
Implemented
Not implemented
Not implemented
Not implemented
Implemented
Not implemented
Subnormal operands are treated as zero. The floating-point custom
instructions do not generate subnormal numbers.
Not implemented. IEEE 754-1985 exception conditions are detected
and handled as shown elsewhere in this table.
Not implemented. IEEE 754-1985 exception conditions are detected
and handled as shown elsewhere in this table.
Optional
Result is ±infinity
Result is ±infinity
Result is a normal number
Result is ±0
Implementation
Nios II Processor Reference Handbook
Table 2–2
2–5