IPR-NIOS Altera, IPR-NIOS Datasheet - Page 190

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–4
Table 8–2. OPX Encodings for R-Type Instructions (Part 2 of 2)
Assembler Pseudo-Instructions
Nios II Processor Reference Handbook
0x0E
0x0F
OPX
and
Instruction
Table 8–3
Pseudo-instructions are used in assembly source code like regular assembly
instructions. Each pseudo-instruction is implemented at the machine level using an
equivalent instruction. The movia pseudo-instruction is the only exception, being
implemented with two instructions. Most pseudo-instructions do not appear in
disassembly views of machine code.
Table 8–3. Assembler Pseudo-Instructions
bgt rA, rB, label
bgtu rA, rB, label
ble rA, rB, label
bleu rA, rB, label
cmpgt rC, rA, rB
cmpgti rB, rA, IMMED
cmpgtu rC, rA, rB
cmpgtui rB, rA, IMMED
cmple rC, rA, rB
cmplei rB, rA, IMMED
cmpleu rC, rA, rB
cmpleui rB, rA, IMMED
mov rC, rA
movhi rB, IMMED
movi rB, IMMED
movia rB, label
movui rB, IMMED
nop
subi rB, rA, IMMED
0x1E
0x1F
OPX
lists pseudo-instructions available in Nios II assembly language.
Pseudo-Instruction
xor
mulxss
Instruction
0x2E
0x2F
OPX
blt rB, rA, label
bltu rB, rA, label
bge rB, rA, label
bgeu rB, rA, label
cmplt rC, rB, rA
cmpgei rB, rA, (IMMED+1)
cmpltu rC, rB, rA
cmpgeui rB, rA, (IMMED+1)
cmpge rC, rB, rA
cmplti rB, rA, (IMMED+1)
cmpgeu rC, rB, rA
cmpltui rB, rA, (IMMED+1)
add rC, rA, r0
orhi rB, r0, IMMED
addi, rB, r0, IMMED
orhi rB, r0, %hiadj(label)
addi, rB, r0, %lo(label)
ori rB, r0, IMMED
add r0, r0, r0
addi rB, rA, (-IMMED)
wrctl
Instruction
Equivalent Instruction
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
0x3E
0x3F
Assembler Pseudo-Instructions
OPX
Instruction