IPR-NIOS Altera, IPR-NIOS Datasheet - Page 196
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
IPR-NIOS
Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet
1.IP-NIOS.pdf
(294 pages)
Specifications of IPR-NIOS
License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
- Current page: 196 of 294
- Download datasheet (3Mb)
8–10
andhi
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rB ← rA & (IMM16 : 0x0000)
andhi rB, rA, IMM16
andhi r6, r7, 100
Calculates the bitwise logical AND of rA and (IMM16 : 0x0000) and stores the result in rB.
None
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit unsigned immediate value
23
22
21
20
19
18
bitwise logical and immediate into high halfword
17
16
15
IMM16
14
13
12
11
10
9
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
4
0x2c
3
2
1
0
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