IPR-NIOS Altera, IPR-NIOS Datasheet - Page 157
IPR-NIOS
Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet
1.IP-NIOS.pdf
(294 pages)
Specifications of IPR-NIOS
License
Renewal License
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Not applicable / Not applicable
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NII51018-10.1.0
Introduction
Nios II Versions
Table 6–1. Nios II Processor Revision History (Part 1 of 2)
Nios II Processor Reference Handbook
December 2010
December 2010
NII51018-10.1.0
10.1
10.0
9.1
9.0
8.1
Version
Each release of the Nios
to the Nios II processor, the software development tools, or both. This document
catalogs the history of revisions to the Nios II processor; it does not track revisions to
development tools, such as the Nios II integrated development environment (IDE).
This chapter contains the following sections:
■
■
■
■
Improvements to the Nios II processor might affect:
■
■
■
Altera implements Nios II revisions such that code written for an existing Nios II core
also works on future revisions of the same core.
The number for any version of the Nios II processor is determined by the version of
the Nios II EDS. For example, in the Nios II EDS version 8.0, all Nios II cores are also
version 8.0.
Table 6–1
December 2010
July 2010
November 2009
March 2009
November 2008
Release Date
“Nios II Versions” on page 6–1
“Architecture Revisions” on page 6–2
“Core Revisions” on page 6–3
“JTAG Debug Module Revisions” on page 6–7
Features of the Nios II architecture—An example of an architecture revision is
adding instructions to support floating-point arithmetic.
Implementation of a specific Nios II core—An example of a core revision is
increasing the maximum possible size of the data cache memory for the Nios II/f
core.
Features of the JTAG debug module—An example of a JTAG debug module
revision is adding an additional trigger input to the JTAG debug module, allowing
it to halt processor execution on a new type of trigger event.
lists the version numbers of all releases of the Nios II processor.
No changes.
No changes.
■
■
No changes.
No changes.
Added optional external interrupt controller interface.
Added optional shadow register sets.
®
II Embedded Design Suite (EDS) introduces improvements
6. Nios II Processor Revision History
Notes
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